Espressif Systems /ESP32-S3 /WCL /Core_0_NMI_MASK_PHASE

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Interpret as Core_0_NMI_MASK_PHASE

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CORE_0_NMI_MASK_PHASE)CORE_0_NMI_MASK_PHASE

Description

Core_0 NMI mask phase register

Fields

CORE_0_NMI_MASK_PHASE

this bit is used to indicates whether the NMI interrupt is being masked, 1 means NMI interrupt is being masked

Links

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